Electronic engineer by training, hacker (in the old-fashioned sense) by inclination. Particularly good with embedded software and FPGAs
I'm currently an engineer at Conekt - which is a part of ZF TRW - but all opinions expressed here are my own, not necessarily ZF TRW's. And possibly not even mine if I'm playing devil's advocate.
Top Network Posts
- 45VHDL or Verilog?
- 21Experiences with Test Driven Development (TDD) for logic (chip) design in Verilog or VHDL
- 19shift a std_logic_vector of n bit to right or left
- 16When must a signal be inserted into the sensitivity list of a process
- 14How to sub with matched groups and variables in Python
- 14Clarification on Ethernet, MII, SGMII, RGMII and PHY
- 13How to decide what platform is best to implement real-time audio processing on?
- View more network posts →